1. Field of the Invention
The present invention relates to power amplifiers and the operation methods therefor. Specifically, the present invention relates to techniques that are effective to optimize an output impedance of a power amplifier when a stand-alone amplification operation of a first amplifier device and parallel amplification operations of the first amplifier device and a second amplifier device are performed.
2. Description of the Related Art
In portable communication apparatus terminals that are battery operated, such as cellular phones, it is required to increase the power efficiency of a power amplifier that transmits RF transmission signals to a base station. The power consumption of a power amplifier needs to be reduced to increase the amount of talk time per battery charge as much as possible.
In U.S. Pat. No. 7,157,966 below, it is disclosed that by connecting, in parallel, a first output stage in which the device size of an output transistor has been optimized for high power and a second output stage in which the device size of an output transistor is optimized for low power, a bias control circuit selects the first output stage during high power operation and the second output stage during low power operation. The first output stage and the second output stage are connected to a single output impedance matching circuit, and the single output impedance matching circuit includes a plurality of capacitors and a plurality of inductors.
Junxiong Deng et al, “A High Average-Efficiency SiGe HBT Power Amplifier for WCDMA Handset Application” IEEE TRANSACTIONS ON MICRO WAVE THEORY AND TECHUNIQUES, VOL. 53, NO. 2, FEBRUARY 2005, PP. 529-537, describes a power amplifier of a cellular phone in which the number of silicon germanium (SiGe) based hetero junction bipolar transistors (HBTs) in an on state is adjusted in response to a change in desired output power. As a result of a low-loss MOS switch being used for the base of each of the transistors, the SiGe HBT transistors are dynamically biased, whereby each of the transistors is completely turned on or completely turned off.
Junxiong Deng et al, “A SiGe PA with Dual Dynamic Bias Control and Memoryless Digital Predistortion for WCDMA Handset Application” 2005 IEEE Radio Frequency Integrated Circuits Symposium, VOL. 41, 12-14 Jun. 2005, PP. 247-250, and Junxiong Deng et al, “A SiGe PA with Dual Dynamic Bias Control and Memoryless Digital Predistortion for WCDMA Handset Application” 2006 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 5, MAY 2006, PP. 1210-1221, describe a power amplifier of a cellular phone where, by forming SiGe HBT transistors in two groups which are a high-output group and a low-output group, the transistor is biased with a power supply voltage Vcc in the high-output group, and two transistors are connected in series and biased with half the power supply voltage, Vcc/2, in the low-output group. Switching between the different groups is controlled by a low-loss MOS switch of the base of the HBT transistor. When the power amplifier is in a low-output region, the high-output group is switched off and the low-output group is switched on. Since the bias voltage has been decreased in the low-output group, DC power loss is markedly reduced. The base of the HBT transistor in the high-output group and the base of the HBT transistor in the low-output group are driven by the output signal of a drive stage through an inter-stage matching circuit and a low-loss MOS switch. It is stated in Junxiong Deng et al, “A SiGe PA with Dual Dynamic Bias Control and Memoryless Digital Predistortion for WCDMA Handset Application” 2006 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 5, MAY 2006, PP. 1210-1221, that the collector of the HBT transistor in the high-output group is directly connected to the input terminal of an output matching circuit, the collectors of the two transistors in the low-output group are connected to one end of an inductor through two capacitors, the other end of the inductor is connected to the input terminal of the output matching circuit, and the output matching circuit is formed of a plurality of capacitors and a plurality of inductors.
FIG. 12 of Japanese Unexamined Patent Application Publication No. 2008-35487 below illustrates an RF power amplifier in which an input signal is directly supplied to the gate of a first amplifier device, the input signal is supplied to the gate of a second amplifier device through a micro-electro-mechanical systems (MEMS) switch, the source of the first amplifier device and the source of the second amplifier device are commonly connected to a ground potential, and the drain of the first amplifier device and the drain of the second amplifier device are commonly connected to a power supply voltage through a load inductor.
Prior to the present invention, the inventors and others participated in the development of a power amplifier that can be mounted in a communication terminal of a next generation cellular phone and that can increase the amount of talk time per battery charge as much as possible.
In order to realize long talk time, it is necessary to optimize the device size or number of output transistors of a power amplifier in a cellular phone in accordance with the output power level. In other words, the device size or number of output transistors is set to a small value when the output level is low, while the device size or number of output transistors is set to a large value when the output level is high, thereby improving the power added efficiency (PAE) of the power amplifier and realizing long talk time.
Although the methods described in U.S. Pat. No. 7,157,966, Junxiong Deng et al, “A High Average-Efficiency SiGe HBT Power Amplifier for WCDMA Handset Application” IEEE TRANSACTIONS ON MICRO WAVE THEORY AND TECHUNIQUES, VOL. 53, NO. 2, FEBRUARY 2005, PP. 529-537, Junxiong Deng et al, “A SiGe PA with Dual Dynamic Bias Control and Memoryless Digital Predistortion for WCDMA Handset Application” 2005 IEEE Radio Frequency Integrated Circuits Symposium, VOL. 41, 12-14 Jun. 2005, PP. 247-250, and Junxiong Deng et al, “A SiGe PA with Dual Dynamic Bias Control and Memoryless Digital Predistortion for WCDMA Handset Application” 2006 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 5, MAY 2006, PP. 1210-1221, allow the optimization described above to be realized, a study by the inventors and others prior to the present invention clarified that these methods have a problem in that, since output transistors having a large device size or provided in a large number and output transistors having a small size or provided in a small number are used, an area occupied by a semiconductor chip is large and the price of a product is high.
The method disclosed in FIG. 12 of Japanese Unexamined Patent Application Publication No. 2008-35487 is a method which also realizes the optimization described above, and the stand-alone amplification operation of the first amplifier device realizes the function of output transistors having a small size or provided in a small number, while the parallel amplification operations of the first amplifier device and the second amplifier device realize the function of output transistors having a large device size or provided in a large number. Hence, this method has an advantage in that an area occupied by a semiconductor chip is small and the price of a product is low.
On the other hand, in the method described in FIG. 12 of Japanese Unexamined Patent Application Publication No. 2008-35487, the output impedance of the power amplifier during a stand-alone operation of the first amplifier device is relatively large, for example, 2 Ω to 3 Ω, while the output impedance of the power amplifier during the parallel amplification operations of the first amplifier device and the second amplifier device is relatively small, for example, 1Ω to 2 Ω. Further, the load pull measurements performed in the study by the inventors and others prior to the present invention clarified that with this method, the above-described stand-alone amplification operation and the above-described parallel amplification operations are different not only in terms of the output impedance but also in terms of the plot diagram of the maximum output and the plot diagram of the minimum power consumption on the Smith chart. In the load pull measurements, which are well known in the area of RF power amplifiers, a measurement parameter, such as output power, is plotted as a complex function of a load as seen from an output transistor.
It is necessary to set the output impedance of a power amplifier in such a manner that importance is placed more on the maximum output power than on the minimum current consumption during the parallel amplification operations of the first amplifier device and the second amplifier device described above, whereas it is necessary to set the output impedance of the power amplifier in such a manner that importance is placed more on the minimum current consumption than on the maximum output power during the stand-alone amplification operation of the first amplifier device described above.
However, Japanese Unexamined Patent Application Publication No. 2008-35487 does not disclose a method of optimizing the output impedance of a power amplifier in such a manner that importance is placed on the minimum current consumption and the maximum output power respectively during the stand-alone amplification operation and the parallel amplification operations described above.
On the other hand, the study by the inventors and others prior to the present invention clarified that the methods described in Junxiong Deng et al, “A High Average-Efficiency SiGe HBT Power Amplifier for WCDMA Handset Application” IEEE TRANSACTIONS ON MICRO WAVE THEORY AND TECHUNIQUES, VOL. 53, NO. 2, FEBRUARY 2005, PP. 529-537, Junxiong Deng et al, “A SiGe PA with Dual Dynamic Bias Control and Memoryless Digital Predistortion for WCDMA Handset Application” 2005 IEEE Radio Frequency Integrated Circuits Symposium, VOL. 41, 12-14 Jun. 2005, PP. 247-250, and Junxiong Deng et al, “A SiGe PA with Dual Dynamic Bias Control and Memoryless Digital Predistortion for WCDMA Handset Application” 2006 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 5, MAY 2006, PP. 1210-1221, have a problem in that many of the low-loss MOS switches, for example, four of them, are connected to the bases of the HBT transistors in the high-output group and the low-output group.
Two of the four MOS switches supply an input signal to the bases of the HBT transistors, while the remaining two MOS switches have a function of discharging the base charges of the HBT transistors to the ground. However, an RF signal, having a relatively large voltage amplitude, of a power amplifier is supplied to these four transistors. The reason for this is that since the power amplification circuit including the HBT transistors of the high-output group and the low-output group forms the final amplification stage of an amplifier, the input terminal of the final amplification stage is driven by an RF signal amplified by the first amplification stage or an intermediate amplification stage. Hence, there is a problem in that since these four MOS transistors need to have a relatively high break down voltage, semiconductor chip areas occupied by these four MOS transistors are large and the price of a product is high. The above described problem was clarified by the study performed by the inventors and others prior to the present invention.